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Job Title: ASIC RTL Design Intern
Location: Austin, TX United States
Position Type: Internship
Post Date: 11/28/2020
Expire Date: 01/28/2021
Job Categories: Computers, Hardware
Job Description
ASIC RTL Design Intern
We are looking for an intern to join a highly specialized team of ASIC/FPGA Chip designers, to design hardware – not software.
Introductory
Amazon AQUA, Advanced Query Acceleration, is a new service offering to the Amazon RedShift data warehouse solution. AQUA is designed from the ground up to enhance performance of analytic query workloads. AQUA achieves high performance by using a highly distributed platform built of the latest generation hardware, specialized Amazon hardware accelerators, and advanced caching techniques. AQUA’s obsession with performance allows customers to experience significantly higher throughput accelerating their ability to answer business questions with more data.
To explore more about Amazon AQUA, visit:
https://www.zdnet.com/article/amazon-redshift-turns-aqua

Position Responsibilities
· Design, develop, implement, test, and document FPGA/ASIC hardware designs.
· Translate functional requirements into robust, efficient, supportable solutions that work well within the overall system architecture.
· Participate in the full development cycle, end-to-end, from writing micro-architecture docs, RTL coding, FPGA synthesis, FPGA place-and-route, timing closure, simulation-based verification, lab testing, and testing to documentation, delivery and maintenance.
· Produce comprehensive, usable hardware documentation.
· Evaluate and make decisions around the use of new or existing hardware components and tools.

BASIC QUALIFICATIONS
· Currently enrolled in PhD (preferred) or Master’s degree or equivalent in Computer Science, Engineering, Mathematics, or a related field and direct experience using these skills for their coursework, dissertation or thesis.
Must have experience in the following skill(s):
· (1) Creating Micro-architectural specs from functional requirements
· (2) System Verilog RTL coding
· (3) FPGA Synthesis
· (4) FPGA Place-and-Route
· (5) Timing closure
· (6) simulation based design verification
· (7) lab testing/lab debug.

PREFERRED QUALIFICATIONS
· Currently enrolled in PhD in Computer Science, Engineering, Mathematics, or a related field and direct experience using these skills for their coursework, dissertation or thesis.

AMER: Amazon internships are full-time (40 hours/week) for 12 consecutive weeks with start dates between May and June 2021. Applicants should have a minimum of one quarter/semester remaining in their studies after their internship concludes.
Qualifications & Requirements
BASIC QUALIFICATIONS
· Currently enrolled in PhD (preferred) or Master’s degree or equivalent in Computer Science, Engineering, Mathematics, or a related field and direct experience using these skills for their coursework, dissertation or thesis.
Must have experience in the following skill(s):
· (1) Creating Micro-architectural specs from functional requirements
· (2) System Verilog RTL coding
· (3) FPGA Synthesis
· (4) FPGA Place-and-Route
· (5) Timing closure
· (6) simulation based design verification
· (7) lab testing/lab debug.

PREFERRED QUALIFICATIONS
· Currently enrolled in PhD in Computer Science, Engineering, Mathematics, or a related field and direct experience using these skills for their coursework, dissertation or thesis.
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